DocumentCode
2713084
Title
Topology and Analysis of a New Resonant Gate Driver
Author
Zhiliang Zhang ; Zhihua Yang ; Sheng Ye ; Yan-Fei Liu
Author_Institution
Dept. of Electr. & Comput. Sci. Eng., Queen´s Univ., Kingston, Ont.
fYear
2006
fDate
18-22 June 2006
Firstpage
1
Lastpage
7
Abstract
This paper proposes a novel resonant gate driver for a high frequency synchronous buck converter. The proposed resonant gate driver can reduce switching losses significantly in addition to gate drive losses compared to a conventional gate driver. Additionally, the proposed driver has better noise immunity to dv/dt effect and is less sensitive to parasitic inductance. Loss analysis and optimization design of the proposed driver are presented in details. A 1 MHz synchronous buck converter with the proposed resonant gate driver was built to verify the functionality
Keywords
driver circuits; network topology; resonant power convertors; switching convertors; high frequency synchronous buck converter; loss analysis; noise immunity; optimization design; parasitic inductance; resonant gate driver; switching loss reduction; Buck converters; Driver circuits; Drives; Frequency conversion; Resonance; Switching frequency; Switching loss; Topology; Virtual reality; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE
Conference_Location
Jeju
ISSN
0275-9306
Print_ISBN
0-7803-9716-9
Type
conf
DOI
10.1109/PESC.2006.1711979
Filename
1711979
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