DocumentCode
2718248
Title
Modeling application specific memories
Author
Das, D.V. ; Kumar, Rajesh ; Lauria, Manu
Author_Institution
Cadence Design Syst. Pvt. Ltd., Noida, India
fYear
1995
fDate
7-8 Aug 1995
Firstpage
10
Lastpage
14
Abstract
Manufacturers´ data sheets express the functionality of memory devices using timing diagrams. The relative time ordering of events can easily be captured in a Hasse diagram, which can then be used as a suitable model to automate behavioral model development
Keywords
application specific integrated circuits; diagrams; integrated memory circuits; modelling; timing; Hasse diagram; application specific memories; behavioral model development automation; event ordering; manufacturers´ data sheets; memory device functionality; relative time ordering; timing diagrams; Buildings; Concurrent computing; Design methodology; Electronic design automation and methodology; Hardware design languages; Manufacturing automation; Pins; Signal processing; Timing; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1995., Records of the 1995 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-7102-5
Type
conf
DOI
10.1109/MTDT.1995.518075
Filename
518075
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