DocumentCode
2720406
Title
Identifying and quantifying variability within a BiCMOS process as part of a DFM strategy
Author
Redford, Mark ; Fallon, Martin ; McGinty, Jim ; Walton, Anthony J. ; Newsam, M.I. ; Michalowicz, George ; MacGregor, Chic
Author_Institution
Analog Process Technol. Dev., Nat. Semicond. (UK) Ltd., Greenock, UK
fYear
1995
fDate
34801
Firstpage
42644
Lastpage
42647
Abstract
This paper presents a case study illustrating how the Design Of Experiments (DOE) in conjunction with Technology CAD (TCAD) can be used to identify sources of variability within a process that has been transferred into manufacturing. It will show how this approach can be used to study potential solutions to improve process performance and produce more robust and manufacturable processes
Keywords
BiCMOS integrated circuits; circuit CAD; design for manufacture; design of experiments; electronic engineering computing; integrated circuit layout; integrated circuit manufacture; BiCMOS process; CAESAR; DFM strategy; RS/1 simulation; SUPREM-3 1D process simulator; design of experiments; manufacturable processes; process performance; technology CAD; variability sources;
fLanguage
English
Publisher
iet
Conference_Titel
Improving the Efficiency of IC Manufacturing Technology, IEE Colloquium on
Conference_Location
London
Type
conf
DOI
10.1049/ic:19950932
Filename
478213
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