DocumentCode
2720479
Title
An ATM chip set for high performance computer interfaces, affording over 100 Mbps sustained throughput
Author
Tomimitsu, Yasuharu ; Kawanago, Satoru ; Yamane, Hiroaki ; Kobunaya, Hideki ; Ohgane, Shoji ; Mizukoshi, Nobuyuki ; Suzuki, Hiroshi
Author_Institution
C&C Syst. Dev. Labs., NEC Corp., Kawasaki, Japan
fYear
1995
fDate
1-4 May 1995
Firstpage
439
Lastpage
442
Abstract
A chip set for interconnecting personal computers and work stations with an ATM (Asynchronous Transfer Mode) LAN has been developed. It makes possible to realize 156 Mbps ATM LAN environment, by simply inserting an add-on board to a personal computer or a work station. For the first time, we achieved more than 100 Mbps as a sustained transfer speed by its advanced architecture, optimized performance and efficient buffer management. The chip set comprises a SAR (AAL and ATM layer) chip, and a PHY (TC sublayer) chip. Implemented in 0.8 μm CMOS technology, it has a total number of transistors of 460 K
Keywords
CMOS digital integrated circuits; add-on boards; asynchronous transfer mode; computer interfaces; local area networks; network interfaces; protocols; 0.8 micron; 156 Mbit/s; AAL; ATM adaptation layer; ATM chip set; CMOS technology; PHY; SAR; TC sublayer; add-on board; asynchronous transfer mode LAN; buffer management; computer interfaces; physical layer; segmentation and reassembly; sustained transfer speed; transmission convergence; Computer architecture; Computer interfaces; Hardware; LAN interconnection; Laboratories; Local area networks; Microcomputers; Physical layer; Protocols; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location
Santa Clara, CA
Print_ISBN
0-7803-2584-2
Type
conf
DOI
10.1109/CICC.1995.518219
Filename
518219
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