• DocumentCode
    2721904
  • Title

    Evaluation of process level redundant checkpointing/restart for HPC systems

  • Author

    Egwutuoha, Ifeanyi P. ; Levy, David ; Selic, Bran

  • Author_Institution
    Electr. & Inf. Eng., Univ. of Sydney, Sydney, NSW, Australia
  • fYear
    2011
  • fDate
    17-19 Nov. 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In recent years, High Performance Computing (HPC) systems have been shifting from expensive massively parallel custom architectures to clusters of commodity personal computers to take advantage of cost and performance benefits. To avoid having to restart an application in case of sudden failure, checkpointing/restart fault tolerance mechanisms are commonly implemented. One drawback to checkpointing/restart is that it creates an overhead which increases the execution time of an application. We present a theoretical analysis of our technique. The results show that the PLR checkpointing/restart can significantly improve the overall reliability of an HPC system.
  • Keywords
    checkpointing; software fault tolerance; software reliability; HPC system; clusters; commodity personal computer; failure; high performance computing; parallel custom architecture; process level redundant checkpointing/restart; restart fault tolerance mechanism; system reliability; Checkpointing; Fault tolerance; Fault tolerant systems; Maintenance engineering; Process control; Program processors; Unified modeling language;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Performance Computing and Communications Conference (IPCCC), 2011 IEEE 30th International
  • Conference_Location
    Orlando, FL
  • ISSN
    1097-2641
  • Print_ISBN
    978-1-4673-0010-0
  • Type

    conf

  • DOI
    10.1109/PCCC.2011.6108098
  • Filename
    6108098