A diagnostic test pattern generation algorithm

The authors present a novel ATPG (automatic test pattern generation) algorithm, based on PODEM, that makes diagnostic test pattern generation feasible for medium-sized combinational circuits described at the gate level with the single-stuck-at-fault assumption. The input to the ATPG is a couple of faults, and either the output is a test pattern that distinguishes them or they are tagged as indistinguishable. The need to consider the fault-free circuit and the two faulty circuits at the same time required the extension of the algebra to encompass two additional values, Δ and δ. A Δ appears on the nodes of the circuit whenever a difference between the two faulty circuits exists. The presence of a δ marks the locations where a difference might exist if the X values on one or both faulty circuits were suitably set. The algorithm excites and propagates Δs onto the primary outputs and is thus called the Δ-algorithm. Preliminary results on a set of benchmark circuits are reported