DocumentCode
2724077
Title
A 65-nm on-chip multi-mode asynchronous local power supply unit for multi-power domain SoCs achieving fine grain DVS
Author
Ichihashi, Motoi ; Lhermet, H. ; Beigné, Edith ; Rothan, Frédéric ; Belleville, Marc ; Amara, Amara
Author_Institution
CEA-Leti, MINATEC, Grenoble, France
fYear
2009
fDate
16-18 Nov. 2009
Firstpage
93
Lastpage
96
Abstract
This paper discusses a local power supply unit designed for fine grain dynamic voltage scaling (DVS) in a multi-power domain SoC. The proposed power supply unit is fully compatible with an I/O library and adaptable to various logic module power needs. It delivers the module operating voltage, from 1.2 V to 0.6 V, according to predefined operating power modes and is equipped with the module power gating. The designed circuit requires five-I/O-pad pitch area in a 65-nm technology. The first test chip demonstrates that the maximum power efficiency is over 87% and the measured current consumption in stand-by mode is only 19 nA regardless of the connected module.
Keywords
power supply circuits; system-on-chip; dynamic voltage scaling; fine grain DVS; five-I/O-pad pitch area; logic module power; module operating voltage; module power gating; multipower domain SoC; on-chip multimode asynchronous local power supply unit; operating power modes; power efficiency; size 65 nm; stand-by mode; stand-by mode current consumption; voltage 1.2 V to 0.6 V; Power supplies; Solid state circuits; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian
Conference_Location
Taipei
Print_ISBN
978-1-4244-4433-5
Electronic_ISBN
978-1-4244-4434-2
Type
conf
DOI
10.1109/ASSCC.2009.5357187
Filename
5357187
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