• DocumentCode
    2724148
  • Title

    Diagnosing CMOS bridging faults with stuck-at fault dictionaries

  • Author

    Millman, Steven D. ; McCluskey, Edward J. ; Acken, John M.

  • Author_Institution
    Comput. Syst. Lab., Stanford Univ., CA, USA
  • fYear
    1990
  • fDate
    10-14 Sep 1990
  • Firstpage
    860
  • Lastpage
    870
  • Abstract
    It is shown that the traditional approach to diagnosing stuck-at faults with fault dictionaries generated for stuck-at faults is not appropriate for diagnosing CMOS bridging faults. A novel technique for using stuck-at-fault dictionaries to diagnose bridging faults is described. Teradyne´s LASAR was used to simulate bridging and stuck-at faults in a number of combinational circuits, including parity trees, multiplexers, and the 74ASCI181 4-b, 16-function ALU (arithmetic and logic unit). When the traditional technique was used, between 30%-50% of the bridging faults were mis-diagnosed, with the presence of a failure indicated on a fault-free node. In addition, as the stuck-at-fault diagnostic ability of a test increased, the bridging fault diagnostic ability decreased. By use of the new technique. over 92% of the bridging faults in the circuits used for this research were diagnosed correctly and less than 4% led to misleading diagnoses
  • Keywords
    CMOS integrated circuits; combinatorial circuits; fault location; integrated circuit testing; logic testing; CMOS bridging faults; Teradyne´s LASAR; diagnosing; logic testing; multiplexers; parity trees; stuck-at fault dictionaries; CMOS technology; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Dictionaries; Fault detection; Fault diagnosis; Laboratories; Semiconductor device modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1990. Proceedings., International
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-8186-9064-X
  • Type

    conf

  • DOI
    10.1109/TEST.1990.114104
  • Filename
    114104