DocumentCode
2725449
Title
Factors affecting Pb-free flip chip bump reliability modeling for life prediction
Author
Syed, Ahmer ; Sharon, Gil ; Darveaux, Robert
Author_Institution
Amkor Technol., Chandler, AZ, USA
fYear
2012
fDate
May 29 2012-June 1 2012
Firstpage
1715
Lastpage
1725
Abstract
The reliability of flip chip bumps remains a concern even after underfilling the gap between the chip and package substrate. A number of factors influence this reliability and it is desirable to evaluate the effect of these factors through simulations. However, underfilling introduces new material and modeling variables into the simulation methodology which need to be considered carefully. This paper reports on the study conducted to evaluate the impact of underfill material properties and modeling methodologies on solder bump response. Further, different post-processing schemes and damage indicators are evaluated to determine the best indicators for fatigue damage in solder bumps for flip chip applications. The results of these evaluations are compared with fatigue data collected on multiple package types using temperature cycle tests with in-situ resistance monitoring.
Keywords
fatigue; flip-chip devices; integrated circuit modelling; integrated circuit reliability; solders; Life Prediction; chip substrate; damage indicator evaluation; fatigue damage indicator; fatigue data collection; flip chip bump reliability modeling; multiple packaging; packaging substrate; post-processing scheme; resistance monitoring; simulation methodology; solder bump response; temperature cycle test; underfill material property; Fatigue; Flip chip; Reliability; Strain; Stress; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4673-1966-9
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2012.6249069
Filename
6249069
Link To Document