Decoupling optimization for IC-package and PCB systems considering high performance microprocessor core and signal interface interactions

Author

Mandhana, Om P.

Author_Institution

Sigrity, Inc., Campbell, CA, USA

fYear

2012

fDate

May 29 2012-June 1 2012

Firstpage

1800

Lastpage

1807

Abstract

The purpose of this paper is to present a modeling and simulation based efficient DECAP optimization process for high performance microprocessor systems consisting of IC-package and PCB, considering the interactions due to mutual coupling of power delivery networks (PDNs) for core and signal interface, corresponding to multiple power boundaries. Effectiveness of the on-die capacitances and package mounted DECAPS on IC-package and PCB for optimizing the input impedance of multiple PDNs is described and illustrated with several simulation results.

Keywords

capacitors; circuit optimisation; integrated circuit modelling; integrated circuit packaging; microprocessor chips; printed circuits; IC-package; PCB systems; PDN mutual coupling; decoupling capacitors; decoupling optimization; high performance microprocessor core; multiple power boundary; on-die capacitances; power delivery networks; signal interface interactions; simulation based efficient DECAP optimization process; Analytical models; Capacitance; Impedance; Integrated circuit modeling; Microprocessors; Optimization; Printed circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd

Conference_Location

San Diego, CA

ISSN

0569-5503

Print_ISBN

978-1-4673-1966-9

Electronic_ISBN

0569-5503

Type

conf

DOI

10.1109/ECTC.2012.6249082

Filename

6249082