Modeling of substrate effects inducing non-ideal collector current at low bias

Bipolar junction transistors with a non isolated substrate have extra effects that need to be included in compact models. These effects are due to the existence of a parasitic pnp transistor inside the main transistor having the substrate as its collector. The parasitic can be modeled as a complete transistor, however that would add too much complexity to the whole model. This work focuses on one aspect of the parasitic pnp: the reverse biasing of the collector-substrate junction. This reverse biasing induces currents that are very low (≈ pA) at lower temperatures yet are significant (≈ μA) when the device is heated up to 150°C. With recent interest in new technologies requiring accurate functioning at higher temperatures, the reverse current of the collector substrate junction ceases to be negligible and has to be taken into account. This work studies that effect, and models it in a sufficient way.