Distributed Current Mode Logic

Author

Ardalan, Shahab ; Moez, Kambiz K. ; Sachdev, Manoj ; Elmasry, Mohamed I.

Author_Institution

Dept. of Electr. & Comput. Eng. c, Waterloo Univ., Ont.

fYear

2006

fDate

38869

Firstpage

229

Lastpage

232

Abstract

This paper introduces a new high-speed CMOS logic family called distributed current mode logic (DCML). This architecture is a combination of existing current mode logic (CML) architecture and the concept of distributed circuits. Distributed current mode logic takes advantages of distributed circuit, and is able to work up to 80 GHz in 0.13 mum CMOS technology. Because of the low noise behavior of the current mode logic family, DCML generates low power/substrate noise. Differential implementation of this logic makes it more immune to the noise generated by other blocks. These properties make this architecture a good candidate for very high-speed data communication integrated circuits

Keywords

CMOS logic circuits; circuit noise; current-mode logic; distributed amplifiers; 0.13 micron; CMOS technology; current mode logic architecture; distributed circuits; distributed current mode logic; high-speed CMOS logic family; high-speed data communication integrated circuits; substrate noise; CMOS logic circuits; CMOS technology; Circuit topology; Data communication; Frequency; Inductors; Integrated circuit noise; Inverters; Logic circuits; Noise generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006 IEEE North-East Workshop on

Conference_Location

Gatineau, Que.

Print_ISBN

1-4244-0416-9

Electronic_ISBN

1-4244-0417-7

Type

conf

DOI

10.1109/NEWCAS.2006.250939

Filename

4016970