DocumentCode
2728420
Title
Test Configurations for Diagnosing Faulty Links in NoC Switches
Author
Raik, Jaan ; Ubar, Raimund ; Govind, Vineeth
Author_Institution
Dept. of Comput. Eng., Tallinn Univ. of Technol., Tallinn
fYear
2007
fDate
20-24 May 2007
Firstpage
29
Lastpage
34
Abstract
The paper proposes a new concept of diagnosing faulty links in network-on-a-chip (NoC) designs. The method is based on functional fault models and it implements packet address driven test configurations. As previous works have shown, such configurations can be applied for achieving near-100 per cent structural fault coverage for the network switches. The main novel contribution of this paper is to extend the use of test configurations for diagnosis purposes and to propose a method for locating faults in the NoC interconnection infrastructure. Additionally, a new concept of functional switch faults, called link faults, is introduced. The approach is well scalable (complexity is square root of the number of switches) and it is capable of unambiguously pinpointing the faulty links inside the switching network.
Keywords
fault diagnosis; network-on-chip; switches; faulty links; functional fault models; interconnection infrastructure; network switches; network-on-a-chip designs; Clocks; Communication switching; Computer networks; Design engineering; Fault diagnosis; Network-on-a-chip; Paper technology; Routing; Switches; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2007. ETS '07. 12th IEEE European
Conference_Location
Freiburg
Print_ISBN
0-7695-2827-9
Type
conf
DOI
10.1109/ETS.2007.41
Filename
4221570
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