DocumentCode
2728439
Title
Optimization of NoC Wrapper Design under Bandwidth and Test Time Constraints
Author
Hussin, Fawnizu Azmadi ; Yoneda, Tomokazu ; Fujiwara, Hideo
Author_Institution
Grad. Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Ikoma
fYear
2007
fDate
20-24 May 2007
Firstpage
35
Lastpage
42
Abstract
In this paper, two wrapper designs are proposed for core- based test application based on Networks-on-Chip (NoC) reuse. It will be shown that the previously proposed NoC wrapper does not efficiently utilize the NoC bandwidth, which may result in poor test schedules. Our wrappers (Type 1 and Type 2) complement each other to overcome this inefficiency while minimizing the overhead. The Type 2 wrapper uses larger area overhead to increase bandwidth efficiency, while the Type 1 takes advantage of some special configurations which may not require a complex and high-cost wrapper. Two wrapper optimization algorithms are applied to both wrapper designs under channel bandwidth and test time constraints, resulting in very little or no increase in the test application time compared to conventional TAM approaches.
Keywords
network-on-chip; optimisation; wrapping; bandwidth efficiency; networks-on-chip; optimization; test time constraints; wrapper design; Bandwidth; Circuit testing; Constraint optimization; Delay; Design optimization; Integrated circuit interconnections; Network-on-a-chip; Scheduling; Throughput; Time factors;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2007. ETS '07. 12th IEEE European
Conference_Location
Freiburg
Print_ISBN
0-7695-2827-9
Type
conf
DOI
10.1109/ETS.2007.30
Filename
4221571
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