• DocumentCode
    2729705
  • Title

    Managing Reconfigurable Resources in Heterogeneous Cores Using Portable Pre-Synthesized Templates

  • Author

    Santambrogio, Marco ; Giani, Matteo ; Memik, Seda Ogrenci

  • Author_Institution
    Politecnico di Milano, Milan
  • fYear
    2007
  • fDate
    20-21 Nov. 2007
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper we consider multi-FPGAs, reconfiguration and system description portability as the processes of specifying and modeling a complete system before it is partitioned and committed to a style/flow of implementation. In the case of a high performance computing cluster employing FPGAs, the reconfigurable elements need to be dynamically re-allocated and reconfigured based on the prevailing workload at a given instance. We particularly target fast configuration and task migration in high performance computing systems, such as server farms. This paper presents a design flow, based in resource sharing across configurations on the reconfigurable devices, which can manage the resource allocation and reconfiguration quickly when resources need to be migrated between different applications. The resources shared across configuration are defined using an isomorphic-driven partitioning approach. This technique detects recurrent structures and produces a partitioned specification in which the identified clusters are instances of repeating templates in the original graph used to describe the input application. Two algorithms for regularity extraction were implemented. The performances of the algorithms were compared with regard to the size and number of regular structures identified by the two approaches, as well as the lime taken to perform their task.
  • Keywords
    field programmable gate arrays; graph theory; logic partitioning; reconfigurable architectures; resource allocation; FPGA; graph theory; heterogeneous core; high performance computing cluster; isomorphic-driven partitioning approach; portable pre-synthesized template; reconfigurable resource management; recurrent structure detection; system description portability; Clustering algorithms; Field programmable gate arrays; High performance computing; Large-scale systems; Multicore processing; Partitioning algorithms; Resource management; Runtime; Scientific computing; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip, 2007 International Symposium on
  • Conference_Location
    Tampere
  • ISSN
    07EX1846C
  • Print_ISBN
    978-1-4244-1368-3
  • Electronic_ISBN
    07EX1846C
  • Type

    conf

  • DOI
    10.1109/ISSOC.2007.4427446
  • Filename
    4427446