A 10-b, 100 MS/s, 2.8 mW CMOS switched-current DAC for low-power/low-voltage signal processing applications

Author

Wang, Jin-Sheng ; Wey, Chin-Long

Author_Institution

Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA

fYear

1998

fDate

9-12 Aug 1998

Firstpage

526

Lastpage

529

Abstract

This paper presents a CMOS switched-current DAC (Digital-to-Analog Converter) circuit which achieves 10-bit resolution, 100 M samples per second conversion rate, and consumes 2.8 mW for 3.3 V power supply voltage, where MOSIS SCNA20 2 μm process is employed. The developed DAC circuit employs a 7-bit multiply-by-two circuit and a 3-bit divide-by-two circuit to simultaneously generate 10 weighted currents. Results show that the developed converter circuit is well suited for low-power/low-voltage signal processing applications

Keywords

CMOS integrated circuits; digital-analogue conversion; low-power electronics; switched current circuits; 10 bit; 2 micron; 2.8 mW; 3.3 V; CMOS SI DAC; LV signal processing applications; MOSIS SCNA20 process; digital-to-analog converter; divide-by-two circuit; low-power signal processing; low-voltage signal processing; multiply-by-two circuit; switched-current DAC; CMOS process; Circuit simulation; Circuit synthesis; MOS devices; Mirrors; Signal processing; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on

Conference_Location

Notre Dame, IN

Print_ISBN

0-8186-8914-5

Type

conf

DOI

10.1109/MWSCAS.1998.759546

Filename

759546