Current-mode readout cicuits with pixel-level logarithmic ADC for IR FPA applications

This paper presents a novel current-mode readout circuits based on logarithmic analog-to-digital converter (LADC) for high speed and high background current infrared focal-plane-array (IR FPA) imaging. With the implementation of LADC, the photocurrent can be directly converted to digital value in pixel level. Zero reset noise is achieved with continuous operation of photodetectors to further reduce the fixed-pattern-noise (FPN) across the FPA. An experimental 64times64 pixel array, each consisting of an n-well/p-substrate photodiode and LADC, has been designed and simulated in standard 0.18 mum CMOS technology. The pixel unit occupies an area of 55 mumtimes55 mum with a fill factor of 25%. The LADC has a logarithmic linearity of 98% over 80 dB input dynamic range. The proposed IR FPA readout circuits can operate at a frame rate of 5000 fps with a power consumption of 9.7 muW per pixel.