A novel architecture for modular implementation of neural networks

Author

Jump, L.B.

Author_Institution

Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA

fYear

1988

fDate

29-31 Aug 1988

Firstpage

25

Lastpage

29

Abstract

An architecture for an efficient, highly parallel implementation of large-scale neural networks is proposed. The basis of the architecture is a ring or a multiring communication network with processing elements as nodes. The architecture provides a modular, expandable implementation in which hardware cost and processing speed can be readily traded. Various neutral-network connectivities and their impact on the communication-network topology are examined and areas for further investigation are suggested

Keywords

network topology; neural nets; parallel architectures; communication-network topology; hardware cost; modular implementation; multiring communication network; neural networks; neutral-network connectivities; parallel architecture; parallel implementation; processing speed; Biological neural networks; Computer architecture; Computer networks; Concurrent computing; Costs; Hardware; Impedance; Large-scale systems; Neural networks; Neurons;

fLanguage

English

Publisher

ieee

Conference_Titel

Languages for Automation: Symbiotic and Intelligent Robots, 1988., IEEE Workshop on

Conference_Location

College Park, MD

Print_ISBN

0-8186-0890-0

Type

conf

DOI

10.1109/LFA.1988.24947

Filename

24947