A Single-Chip Dual-Band 0.25μm CMOS Transceiver for 802.11a/b/g Wireless LAN

Author

Kuo, Ming-Ching ; Lee, Yi-Bin ; Kao, Shiau-Wen ; Chen, Chih-Hung ; Ko, Chun-Lin ; Yang, Tzu-Yi

Author_Institution

SoC Technol. Center, Ind. Technol. Res. Inst., Hsinchu

fYear

2005

fDate

1-3 Nov. 2005

Firstpage

261

Lastpage

264

Abstract

This paper presents a dual-band, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, transceiver for IEEE 802.11a/b/g standards in a 0.25mum CMOS process. With a novel architecture and frequency planning, only one voltage-controlled oscillator and frequency synthesizer is required to perform frequency transferring for dual-band operation, and the building blocks of both receiver and transmitter could be shared as many as possible. The fully integrated VCO and frequency synthesizer centered at 3.8GHz achieves an integrated phase noise of 1.35deg rms. The transmitter achieves -33dB EVM at -3dBm output power, and -29dB EVM at -7dBm output power from the integrated preamplifier for 2.4GHz and 5GHz bands respectively. The receiver also exhibits a noise figure of 3dB at 2.4GHz band and 3.8dB at 5GHz band. The transceiver occupies an area of 25mm²

Keywords

CMOS analogue integrated circuits; frequency synthesizers; microwave integrated circuits; preamplifiers; transceivers; voltage-controlled oscillators; wireless LAN; 0.25 micron; 2.4 to 2.5 GHz; 3 dB; 3.8 dB; 5.15 to 5.35 GHz; 802.11a/b/g wireless LAN; CMOS transceiver; dual-band transceiver; frequency planning; single-chip transceiver; transceiver architecture; CMOS process; Dual band; Frequency synthesizers; Phase noise; Power generation; Preamplifiers; Transceivers; Transmitters; Voltage-controlled oscillators; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Asian Solid-State Circuits Conference, 2005

Conference_Location

Hsinchu

Print_ISBN

0-7803-9162-4

Electronic_ISBN

0-7803-9163-2

Type

conf

DOI

10.1109/ASSCC.2005.251715

Filename

4017581