Design of a highly parallel AI processor using new multiple-valued MOS devices

A design for a highly parallel processor for real-time reasoning in artificial intelligence (AI) is presented. Knowledge is represented by an associative network based on multiple-valued logic, so that a universal representation can be achieved by varying the parameters between nodes. High-speed reasoning can be attributed to the parallel graph-search technique on this associative network. For its direct implementation, special MOS devices with threshold voltages that are controllable by the external input signals are used. For the four-valued associative network, it is demonstrated that the number of memory cells, cell interconnections, and transistors can be greatly reduced in comparison with the corresponding binary implementation.<>