DocumentCode
2740807
Title
Modeling and fabrication of vertical pillar MOSFETs made in recrystallized Si
Author
Cho, Hyun-Jin ; Plummer, James D.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA, USA
fYear
2000
fDate
2000
Firstpage
50
Lastpage
51
Abstract
We report a simple analytical model for vertical pillar MOSFETs including bulk traps. The model predicts that the threshold voltage increases as the trap density increases. The analytical solution yields good agreement with MEDICI simulations confirming the model. The model is used to evaluate the electrical characteristics of devices previously fabricated (Cho et al, Symp. VLSI Tech., p. 31, 1999)
Keywords
MOSFET; electron traps; elemental semiconductors; hole traps; recrystallisation; semiconductor device measurement; semiconductor device models; silicon; MEDICI simulations; MOSFET fabrication; Si; analytical model; bulk traps; electrical characteristics; modeling; recrystallized Si; threshold voltage; trap density; vertical pillar MOSFETs; Analytical models; Doping; FETs; Fabrication; MOSFETs; Medical simulation; Poisson equations; Predictive models; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2000 IEEE International
Conference_Location
Wakefield, MA
ISSN
1078-621X
Print_ISBN
0-7803-6389-2
Type
conf
DOI
10.1109/SOI.2000.892764
Filename
892764
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