• DocumentCode
    2741747
  • Title

    Multiple SOI layers by multiple Smart-Cut(R) transfers

  • Author

    Maleville, C. ; Barge, T. ; Ghyselen, B. ; Auberton, A.J. ; Moriceau, W. ; Cartier, A.M.

  • Author_Institution
    SOITEC SA, Crolles, France
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    134
  • Lastpage
    135
  • Abstract
    Silicon on insulator (SOI) technologies are now entering mainstream applications, with recent announcements regarding for instance microprocessor applications. One condition for this to happen has been proof that SOI material manufacturing processes exist that are compatible with such industrial developments (availability, cost, quality, etc.). Among those processes, the Smart-Cut(R) process is based on layer transfer from one substrate to another (Bruel, 1996). Stacking monocrystalline silicon on another silicon substrate with a silica layer in between is then possible and indeed is being used on a industrial scale to manufacture SOI wafers. Beyond simple SOI wafers that can also be high value added substrates for other applications such as photonics, sensors and other micromachining purposes, we demonstrate in this paper how the Smart-Cut(R) process can be seen as a basic step and how this process can be used to realize multiple SOI wafers, allowing different crystalline and/or amorphous layers to be stacked
  • Keywords
    amorphous semiconductors; ion implantation; semiconductor thin films; silicon-on-insulator; wafer bonding; SOI material manufacturing processes; SOI technologies; SOI wafer manufacture; SOI wafers; Si-SiO2; Smart-Cut process; amorphous layer stacking; crystalline layer stacking; hydrogen implantation; industrial developments; layer transfer; micromachining applications; microprocessor applications; monocrystalline silicon stacking; multiple SOI layers; multiple SOI wafers; multiple Smart-Cut transfers; photonics applications; sensor applications; silica layer; silicon on insulator technologies; silicon substrate; value added substrates; wafer availability; wafer bonding; wafer cost; wafer quality; Costs; IEEE news; Manufacturing industries; Manufacturing processes; Micromachining; Microprocessors; Optoelectronic and photonic sensors; Silicon compounds; Silicon on insulator technology; Stacking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2000 IEEE International
  • Conference_Location
    Wakefield, MA
  • ISSN
    1078-621X
  • Print_ISBN
    0-7803-6389-2
  • Type

    conf

  • DOI
    10.1109/SOI.2000.892806
  • Filename
    892806