DocumentCode
2755097
Title
A Practical Approach to Threshold Test Generation for Error Tolerant Circuits
Author
Ichihara, Hideyuki ; Sutoh, K. ; Yoshikawa, Yuki ; Inoue, Tomoo
Author_Institution
Grad. Sch. of Inf. Sci., Hiroshima City Univ., Hiroshima, Japan
fYear
2009
fDate
23-26 Nov. 2009
Firstpage
171
Lastpage
176
Abstract
Threshold testing, which is an LSI testing method based on the acceptability of faults, is effective in yield enhancement of LSIs and selective hardening for LSI systems. In this paper, we propose test generation models for threshold test generation. Using the proposed models, we can efficiently identify acceptable faults and generate test patterns for unacceptable faults with a general test generation algorithm, i.e., without a test generation algorithm specialized for threshold testing. Experimental results show that our approach is practically effective.
Keywords
automatic test pattern generation; fault diagnosis; large scale integration; tolerance analysis; LSI testing method; error tolerant circuits; fault acceptability; selective hardening; threshold test generation; yield enhancement; Automatic test pattern generation; Circuit faults; Circuit testing; Error analysis; Fault diagnosis; Large scale integration; Life estimation; Logic testing; System testing; Test pattern generators; acceptable fault; error significance; error tolerance; test generation model; threshold testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Asian Test Symposium, 2009. ATS '09.
Conference_Location
Taichung
ISSN
1081-7735
Print_ISBN
978-0-7695-3864-8
Type
conf
DOI
10.1109/ATS.2009.19
Filename
5359371
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