• DocumentCode
    2760285
  • Title

    Fine pitch TSV integration in silicon micropin-fin heat sinks for 3D ICs

  • Author

    Dembla, Ashish ; Zhang, Yue ; Bakir, Muhannad S.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2012
  • fDate
    4-6 June 2012
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Future high performance 3D systems require a systematic co-design of their electrical interconnect network and their heat removal mechanism. This paper presents fine pitch (20μm) and high aspect ratio (18:1) TSVs integrated in a micropin-fin heat sink capable of removing power density of 100W/cm2 and resulting in junction temperatures below 50°C.
  • Keywords
    elemental semiconductors; heat sinks; integrated circuit design; integrated circuit interconnections; integrated circuit packaging; silicon; three-dimensional integrated circuits; 3D IC; Si; electrical interconnect network; fine pitch TSV integration; heat removal mechanism; junction temperature; micropin-fin heat sink; power density; size 20 mum; systematic codesign; Heat sinks; Junctions; Resistance; Resistance heating; Silicon; Temperature measurement; Through-silicon vias;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference (IITC), 2012 IEEE International
  • Conference_Location
    San Jose, CA
  • ISSN
    pending
  • Print_ISBN
    978-1-4673-1138-0
  • Electronic_ISBN
    pending
  • Type

    conf

  • DOI
    10.1109/IITC.2012.6251587
  • Filename
    6251587
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2760285