• DocumentCode
    2768016
  • Title

    Run-Time Error Detection in Polynomial Basis Multiplication Using Linear Codes

  • Author

    Bayat-Saramdi, Siavash ; Hasan, M.A.

  • Author_Institution
    Waterloo Univ., Waterloo
  • fYear
    2007
  • fDate
    9-11 July 2007
  • Firstpage
    204
  • Lastpage
    209
  • Abstract
    In this article we consider detection of errors in polynomial basis multipliers, which have applications in channel coding, VLSI testing, and cryptography. Error detection is performed by applying a class of linear codes while the multiplier is in use. In this article, two error detection schemes are presented. Results show that the probability of error detection of our single-input encoding (SIE) scheme using eight redundant bits is approximately 0.996. Additionally, the time and area overheads of the schemes for our bit-serial implementations are in a reasonable range, e.g., for the SIE scheme with eight redundant bits, the area overhead is 39.71% and the time overhead has been observed to be negligible.
  • Keywords
    digital arithmetic; error detection codes; linear codes; multiplying circuits; polynomials; probability; VLSI testing; channel coding; cryptography; linear codes; polynomial basis multiplication; run-time error detection probability; single-input encoding scheme; Channel coding; Circuits; Computer errors; Cryptography; Digital systems; Galois fields; Linear code; Polynomials; Runtime; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-specific Systems, Architectures and Processors, 2007. ASAP. IEEE International Conf. on
  • Conference_Location
    Montreal, Que.
  • ISSN
    2160-0511
  • Print_ISBN
    978-1-4244-1026-2
  • Electronic_ISBN
    2160-0511
  • Type

    conf

  • DOI
    10.1109/ASAP.2007.4429981
  • Filename
    4429981