• DocumentCode
    2768103
  • Title

    Benchmarks for cell synthesis

  • Author

    HiIl, D.D. ; Preas, Bryan

  • Author_Institution
    AT&T Bell Lab., Murray Hill, NJ, USA
  • fYear
    1990
  • fDate
    24-28 Jun 1990
  • Firstpage
    317
  • Lastpage
    320
  • Abstract
    Cell synthesis is the process of transforming detailed, transistor level specifications and technology information into layout. While cell synthesis has been investigated for several years, only recently has it become practical and pervasive. To accelerate this process and to encourage further refinement, a set of benchmarks was developed for cell synthesis tools. The benchmarks try to balance the objective of universal participation against that of comprehensive testing. They cover the areas of arithmetic, finite state machines (FSM), RAM, and analog design and include detailed descriptions of technology rules. Discussed are the benchmarks, and how they may be used as a guide to future work in this field
  • Keywords
    circuit layout CAD; performance evaluation; RAM; analog design; benchmarks; cell synthesis; comprehensive testing; finite state machines; technology information; transistor level specifications; Acceleration; Arithmetic; Benchmark testing; Circuit synthesis; Circuit testing; Design automation; Integrated circuit interconnections; Integrated circuit synthesis; Packaging; Refining;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
  • Conference_Location
    Orlando, FL
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-363-9
  • Type

    conf

  • DOI
    10.1109/DAC.1990.114873
  • Filename
    114873