A reliability evaluation methodology for memory chips for space applications when sample size is small

Author

Chen, Yuan ; Nguyen, Duc ; Guertin, Steven ; Bernstein, J. ; White, Mark ; Menke, Robert ; Kayali, Sammy

Author_Institution

Electron. Parts Eng. Office, Jet Propulsion Lab., Pasadena, CA, USA

fYear

2003

fDate

20-23 Oct. 2003

Firstpage

91

Lastpage

94

Abstract

This paper presents a reliability evaluation methodology to obtain the statistical reliability evaluation methodology to obtain the statistical reliability information of memory chips for space applications when the test sample size needs to be kept small because of the high cost of the radiation hardness memories. This methodology can be also used to generate overdriving guidelines and characterize production lines in commercial applications and to obtain de-rating guidelines in space applications.

Keywords

radiation hardening (electronics); semiconductor device reliability; semiconductor storage; statistical analysis; commercial applications; de-rating guidelines; memory chips; overdriving guidelines; production lines characterization; radiation hardness memories cost; reliability evaluation; space applications; statistical reliability information; Acceleration; Costs; Educational institutions; Guidelines; Production; Reliability engineering; Space missions; Space technology; Testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Reliability Workshop Final Report, 2003 IEEE International

Print_ISBN

0-7803-8157-2

Type

conf

DOI

10.1109/IRWS.2003.1283307

Filename

1283307