DocumentCode
2768388
Title
Correlation of ramped current to constant voltage gate oxide reliability testing on leading edge DRAM technology
Author
Aichmayr, G. ; Beyer, A.
Author_Institution
Infineon Technol. SC300 GmbH, Dresden, Germany
fYear
2003
fDate
20-23 Oct. 2003
Firstpage
99
Lastpage
100
Abstract
A correlation between ramped current charge to breakdown tests and long term constant voltage measurements was done on scribe line gate oxide test structures on two different sets of hardware. This empirical/statistical approach allows for a quick inline lifetime assessment of hardware avoiding delays due to long term "time to breakdown" measurements. Results based on this instantaneous assessment can trigger fast action and therefore increase cost efficiency.
Keywords
DRAM chips; failure analysis; semiconductor device breakdown; semiconductor device reliability; semiconductor device testing; statistical analysis; DRAM; constant voltage gate oxide reliability testing; hardware avoiding delays; inline lifetime assessment; ramped current correlation; scribe line gate oxide test structures; time-to-breakdown measurements; Breakdown voltage; Costs; Delay effects; Electric breakdown; Hardware; Lead compounds; Random access memory; Testing; Time measurement; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report, 2003 IEEE International
Print_ISBN
0-7803-8157-2
Type
conf
DOI
10.1109/IRWS.2003.1283309
Filename
1283309
Link To Document