DocumentCode
2768402
Title
From Bit Level Systolic Arrays to HDTV Processor Chips
Author
McCanny, John V. ; Woods, Roger F. ; McWhirter, John G.
Author_Institution
Queen¿s University Belfast, Belfast, N Ireland
fYear
2006
fDate
Sept. 2006
Firstpage
159
Lastpage
162
Abstract
The paper starts presents the work initially carried out by Queen¿s University and RSRE (now Qinetiq) in the development of advanced architectures and microchips based on systolic array architectures. The paper outlines how this has led to the development of highly complex designs for high definition TV and highlights work both on advanced signal processing architectures and tool flows for advanced systems.
Keywords
Arithmetic; Circuits; Computer architecture; Digital filters; Digital signal processing; Digital signal processing chips; HDTV; IIR filters; Silicon; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems, Architectures and Processors, 2006. ASAP '06. International Conference on
Conference_Location
Steamboat Springs, CO
ISSN
2160-0511
Print_ISBN
0-7695-2682-9
Type
conf
DOI
10.1109/ASAP.2006.35
Filename
4019508
Link To Document