Evaluating Hardware Support for Reference Counting Using Software Configurable Processors

Reference counting is an incremental garbage collection technique that yields nearly unnoticeable pause time but can suffer from high processing overhead. Previous attempts to use hardware to reduce this overhead have shown successes but limited applicability. With recent discovery that reference counting can be well suited for Java embedded devices, it is worthwhile to rethink hardware solutions that can further improve its performance by leveraging current trends in embedded computing. In this paper, we introduce a custom instruction solution that is (i) more practical because it only provides hardware support for the expensive but straight-forward software function-reference count update; the existing complex runtime functions such as memory allocation and liberation remain unchanged and (ii) better positioned for widespread adoption because it is designed to leverage readily available configurable logics in many embedded processor cores. As a proof-of-concept, we implement two reference counting algorithms that utilize the proposed custom instructions on Stretch S5000 software reconfigurable processors. We then analyze the performance impacts on the execution time as well as the architectural behavior. The results show that we can achieve as much as 70% performance gain over pure software implementation.