DocumentCode
2771820
Title
Parasitic effect analysis and modeling for a differential LNA design
Author
Kim, Moon-Sun ; Yi, Jin-Sung ; Yoo, Hyung-Joun
Author_Institution
Syst. Integration Technol. Inst., Inf. & Commun. Univ., Daejeon, South Korea
fYear
2003
fDate
16-18 Dec. 2003
Firstpage
117
Lastpage
120
Abstract
In this paper, parasitic effect of CMOS differential LNA is discussed. The sources of parasitic effects are MOS transistor, differential structure, pad, and spiral inductor. Those parasitic effects are analyzed for better exact performance prediction. Differential LNA is simulated with and without parasitic effects. And finally measurement results are discussed and compared with simulated ones.
Keywords
CMOS analogue integrated circuits; MOSFET; differential amplifiers; semiconductor device models; CMOS differential LNA; MOS transistor; differential LNA design; differential structure; low noise amplifier; parasitic effect analysis; spiral inductor; Circuit simulation; Inductors; MOS capacitors; MOSFETs; Parasitic capacitance; RF signals; Radio frequency; Semiconductor device modeling; Signal processing; Spirals;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
Print_ISBN
0-7803-7749-4
Type
conf
DOI
10.1109/EDSSC.2003.1283496
Filename
1283496
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