• DocumentCode
    2781110
  • Title

    Runtime Verification of k-Mutual Exclusion for SoCs

  • Author

    Ikiz, Selma ; Sen, Alper

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX
  • fYear
    2007
  • fDate
    5-6 Dec. 2007
  • Firstpage
    44
  • Lastpage
    50
  • Abstract
    We present an efficient runtime verification environment for detecting mutual exclusion predicates. Such predicates are important for keeping the safe operation of concurrent systems. Our environment models execution traces as partial order traces to increase scalability in runtime verification. We compare two techniques implemented in POTA tool, namely k-exclusion and computation slicing. The k-exclusion problem is a generalization of the mutual exclusion problem in which up to k processes may be in their critical sections at the same time. Our k-exclusion algorithm exploits the fact that if there is a k-exclusion violation then it is impossible to partition events from critical sections into k queues. We earlier presented efficient computation slicing algorithms to detect predicates from a subset of temporal logic CTL. We performed experiments using POTA tool on scalable protocols. Our comparison shows that k-exclusion is substantially better than slicing both in terms of time and space. In all fairness, slicing handles general class of predicates from temporal logic CTL, whereas k-exclusion algorithm handles only a very specific, nonetheless useful, class of mutual exclusion predicates.
  • Keywords
    concurrency control; formal verification; logic CAD; program slicing; system-on-chip; temporal logic; CTL; SoC; computation slicing algorithms; concurrent systems; k-exclusion problem; k-mutual exclusion; partial order traces; runtime verification; temporal logic; Concurrent computing; Delay; Design engineering; Formal verification; Logic; Microprocessors; Partitioning algorithms; Protection; Runtime environment; Semiconductor device testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification, 2007. MTV '07. Eighth International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-4093
  • Print_ISBN
    978-0-7695-3241-7
  • Type

    conf

  • DOI
    10.1109/MTV.2007.21
  • Filename
    4620151