Degradation Dependent on Channel Width in Sequential Lateral Solidified Poly-Si Thin Film Transistors

Sequential lateral solidification (SLS) technology developed for crystallizing amorphous Si enlarges grain size effectively. However, thin-film transistors made by SLS suffer reliability issues possibly due to the innate sub-grain boundaries parallel to the drain current direction as a result of the solidification process. In this study, we report the first-time observed channel-width- dependent degradation on these devices after hot carrier stress. A model was proposed and verified through the simulated sub-circuit characteristics, which successfully explains the degraded transistor behavior and its width dependence.