DocumentCode
2787296
Title
Performance Per Watt Benefits of Dynamic Core Morphing in Asymmetric Multicores
Author
Rodrigues, Rance ; Annamalai, Arunachalam ; Koren, Israel ; Kundu, Sandip ; Khan, Omer
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Amherst, Amherst, MA, USA
fYear
2011
fDate
10-14 Oct. 2011
Firstpage
121
Lastpage
130
Abstract
The trend toward multicore processors is moving the emphasis in computation from sequential to parallel processing. However, not all applications can be parallelized and benefit from multiple cores. Such applications lead to under-utilization of parallel resources, hence sub-optimal performance/watt. They may however, benefit from powerful uniprocessors. On the other hand, not all applications can take advantage of more powerful uniprocessors. To address competing requirements of diverse applications, we propose a heterogeneous multicore architecture with a Dynamic Core Morphing (DCM) capability. Depending on the computational demands of the currently executing applications, the resources of a few tightly coupled cores are morphed at runtime. We present a simple hardware-based algorithm to monitor the time-varying computational needs of the application and when deemed beneficial, trigger reconfiguration of the cores at fine-grain time scales to maximize the performance/watt of the application. The proposed dynamic scheme is then compared against a baseline static heterogeneous multicore configuration and an equivalent homogeneous configuration. Our results show that dynamic morphing of cores can provide performance/watt gains of 43% and 16% on an average, when compared to the homogeneous and baseline heterogeneous configurations, respectively.
Keywords
multiprocessing systems; parallel processing; asymmetric multicores; dynamic core morphing; hardware-based algorithm; multicore processors; parallel processing; performance per watt benefits; sequential processing; Art; Benchmark testing; Hardware; Instruction sets; Multicore processing; Runtime; Area-equivalent homogeneous multicore (HMG); Asymmetric Multicore Processor (AMP); Dynamic Core Morphing (DCM); Instructions per cycle (IPC);
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures and Compilation Techniques (PACT), 2011 International Conference on
Conference_Location
Galveston, TX
ISSN
1089-795X
Print_ISBN
978-1-4577-1794-9
Type
conf
DOI
10.1109/PACT.2011.18
Filename
6113794
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