DocumentCode
2789806
Title
A routing methodology for three-dimensional microelectronic structure
Author
Tong, C.C. ; Wu, C.L.
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fYear
1990
fDate
12-14 Aug 1990
Firstpage
180
Abstract
The authors define the three-dimensional routing geometry and propose a routing methodology. The routing problem is divided into two independent parts: in-layer routing. The inter-layer routing problem is transformed into a traditional two-dimensional routing problem. Extra rows and/or columns may be needed to complete the transformation
Keywords
circuit layout CAD; integrated circuit technology; network topology; 3D routeing geometry; in-layer routing; routing methodology; three-dimensional microelectronic structure; Computational geometry; Etching; Microelectronics; Printed circuits; Routing; Silicon compounds; Silicon on insulator technology; Two dimensional displays; Very large scale integration; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location
Calgary, Alta.
Print_ISBN
0-7803-0081-5
Type
conf
DOI
10.1109/MWSCAS.1990.140681
Filename
140681
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