Eliminating Word Line Bending In Floating Gate NOR Flash Memory To Reduce Array Size and Improve Manufacturability

In floating gate (FG) NOR flash memory arrays, word lines (WL) bend at V_ss columns to accommodate the V_ss contacts. As the memory cell is scaled down, patterning of the WL bending becomes more and more challenging. Furthermore, to ensure that the WL bending does not extend to the adjacent memory cells to cause abnormal electrical characteristics of the adjacent cells, we have to increase the V_ss column width to three or more pitches. The wider V_ss columns result in unequal line and spacing, which makes a significant impact on the process window of several modules. Therefore, the WL bending is a process limiter to core cell scaling and manufacturing. In this work, we have succeeded in a device approach to eliminate the WL bending by an additional mask and implant to connect V_ss lines and contacts through conductive V_ss transistors. The new memory array without WL bending shows comparable device performance and improves manufacturability significantly.