DocumentCode
2794668
Title
A process invariant analog neural network IC with dynamically refreshed weights
Author
Weller, Dennis J. ; Spencer, Richard R.
Author_Institution
Hewlett Packard, Colorado Springs, CO, USA
fYear
1990
fDate
12-14 Aug 1990
Firstpage
273
Abstract
An analog neural network IC whose operation is independent of process variation and gradients has been designed and built. RMS (root-mean-square) errors in the transfer function were observed to be under 2%. Additionally, an analog refresh scheme has been designed to maintain synapse weights without need for RAM. Measurements suggest that a minimum of 5 bit weight resolution is obtainable with the present design. Higher resolutions could be obtained with refinements to the synapse and refresher circuits
Keywords
analogue circuits; neural nets; transfer functions; RMS errors; analog refresh scheme; dynamically refreshed weights; process invariant analog neural network IC; synapse weights; transfer function; weight resolution; Analog integrated circuits; Artificial neural networks; Feedforward systems; Neural networks; Shape control; Solid state circuits; Springs; Transconductance; Transfer functions; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location
Calgary, Alta.
Print_ISBN
0-7803-0081-5
Type
conf
DOI
10.1109/MWSCAS.1990.140705
Filename
140705
Link To Document