DocumentCode
2794696
Title
A process logic for distributed system synthesis
Author
Isobe, Yoshinao ; Ohmaki, Kazuhito
Author_Institution
Electrotech. Lab., Ibaraki, Japan
fYear
2000
fDate
2000
Firstpage
62
Lastpage
69
Abstract
We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency)
Keywords
algebraic specification; computability; concurrency theory; process algebra; DS algebra; SP logic; concurrent behavior; distributed system synthesis; interleaving behavior; process algebra; process logic; satisfiability; Algebra; Carbon capture and storage; Concurrent computing; Interleaved codes; Laboratories; Logic functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Software Engineering Conference, 2000. APSEC 2000. Proceedings. Seventh Asia-Pacific
ISSN
1530-1362
Print_ISBN
0-7695-0915-0
Type
conf
DOI
10.1109/APSEC.2000.896684
Filename
896684
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