• DocumentCode
    2795029
  • Title

    VLSI-implementable classically conditioned neural elements

  • Author

    Nintunze, Novat ; Wu, Angus ; Chintrakulchai, Pichet ; Meador, Jack

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Washington State Univ., Pullman, WA, USA
  • fYear
    1990
  • fDate
    12-14 Aug 1990
  • Firstpage
    281
  • Abstract
    Hardware implementation of the phenomena of classical conditioning is discussed. The circuits are built around a programmable floating gate synapse studied in earlier works and thought to be a part of an impulse neural network. Simulation results related to phenomena such as acquisition and its extinction, blocking and second order conditioning are presented. The methodology followed is that of using specialized cells. This method further allows the realization of phenomena currently under investigation such as facilitation, sensitization and habituation. Current research involves the use of pulse coded Hebbian laws in search of economical circuitry for VLSI implementation
  • Keywords
    VLSI; neural nets; blocking; classical conditioning; facilitation; neural elements; programmable floating gate synapse; pulse coded Hebbian laws; second order conditioning; sensitization; Animals; Chromium; Coupling circuits; Equations; FETs; Hardware; Instruments; Integrated circuit interconnections; Lifting equipment; Neurons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
  • Conference_Location
    Calgary, Alta.
  • Print_ISBN
    0-7803-0081-5
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1990.140707
  • Filename
    140707