Strained MOSFETs on ordered SiGe dots

Author

Cervenka, Johann ; Kosina, Hans ; Selberherr, Siegfried ; Zhang, Jianjun ; Hrauda, Nina ; Stangl, Julian ; Bauer, Guenther ; Vastola, Guglielmo ; Marzegalli, Anna ; Miglio, Leo

Author_Institution

Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria

fYear

2010

fDate

14-16 Sept. 2010

Firstpage

297

Lastpage

300

Abstract

The potential of strained DOTFET technology is demonstrated. This technology uses a SiGe island as a stressor for a Si capping layer, into which the transistor channel is integrated. The structure information is extracted from AFM measurements of fabricated samples. Strain on the upper surface of a 30 nm thick Si layer is in the range of 0.7%, as supported by finite element calculations. The Ge content in the SiGe island is 30% on average, showing an increase towards the top of the island. Based on realistic structure information, three-dimensional strain profiles are calculated and device simulations are performed. Up to 15% enhancement of the NMOS saturation current is predicted.

Keywords

Ge-Si alloys; MOSFET; finite element analysis; semiconductor materials; semiconductor quantum dots; AFM measurement; DOTFET technology; NMOS saturation current; Si capping layer; SiGe; SiGe dots; finite element calculation; strained MOSFET; three-dimensional strain profile; Logic gates; Semiconductor process modeling; Silicon; Silicon germanium; Strain; Substrates; Surface treatment;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European

Conference_Location

Sevilla

ISSN

1930-8876

Print_ISBN

978-1-4244-6658-0

Type

conf

DOI

10.1109/ESSDERC.2010.5618356

Filename

5618356