DocumentCode
2805759
Title
CALLAS/OASIS: Combining Behavioral and Register-Transfer Synthesis Systems
Author
Pilsl, Michael ; Brglez, Franc
Author_Institution
Siemens AG, Central Research Labs, Munich, Germany
fYear
1992
fDate
1-3 Mar 1992
Firstpage
145
Lastpage
149
Keywords
Benchmark testing; Chip scale packaging; Control system synthesis; Design optimization; Electrical equipment industry; Hardware; Libraries; Logic design; Performance evaluation; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
System Theory, 1992. Proceedings. SSST/CSA 92. The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design
ISSN
0094-2898
Print_ISBN
0-8186-2665-8
Type
conf
DOI
10.1109/SSST.1992.712211
Filename
712211
Link To Document