DocumentCode
2806427
Title
Combining process and statistical variability in the evaluation of the effectiveness of corners in digital circuit parametric yield analysis
Author
Asenov, P. ; Kamsani, N.A. ; Reid, D. ; Millar, C. ; Roy, S. ; Asenov, A.
Author_Institution
Dept. of Electron. & Electr. Eng., Device Modeling Group, Univ. of Glasgow, Glasgow, UK
fYear
2010
fDate
14-16 Sept. 2010
Firstpage
130
Lastpage
133
Abstract
This paper focuses on two main types of MOSFET variability - systematic (process) and statistical (random) variability and discusses the use of process corners as a measure of yield and circuit performance. We provide a methodology for performing large-scale statistical SPICE simulations as a means of evaluating the accuracy of corners in a system dominated by statistical variability and then expand the methodology to include both systematic and statistical variability within the same large-scale SPICE simulations. This large-scale statistical/systematic approach is compared to the “global + local” statistical corner approach, which consists of statistical simulations around the process corners. Finally 2D kernel density estimates are used to extract yield data from the statistical simulations to allow energy/delay/yield optimization to be performed. This in turn highlights the deficiencies of the statistical corner approach.
Keywords
MOSFET; SPICE; statistical analysis; 2D kernel density estimates; MOSFET variability; digital circuit parametric yield analysis; global + local statistical corner approach; large-scale statistical SPICE simulation; process corners; statistical variability; systematic variability; Adders; Delay; Integrated circuit modeling; Inverters; MOSFET circuits; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference (ESSDERC), 2010 Proceedings of the European
Conference_Location
Sevilla
ISSN
1930-8876
Print_ISBN
978-1-4244-6658-0
Type
conf
DOI
10.1109/ESSDERC.2010.5618458
Filename
5618458
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