• DocumentCode
    2809491
  • Title

    The Design of Image Compression IP Core Based on The Standard of Avalon - ST

  • Author

    Fu Yang ; Guo Peiyuan ; Liu Song

  • Author_Institution
    Coll. of Comput. & Inf. Eng., Beijing Technol. & Bus. Univ., Beijing, China
  • fYear
    2009
  • fDate
    19-20 Dec. 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The paper introduces the design of image compression IP core based on the standard of Avalon-ST. The IP core is based on JPEG compressions principle which includes color conversion module, FDCT & zigzag module, quantification module, run coding module, Huffman coding module, and these modules are made up top-level module, used Avalon-ST bus interface, completing image compression IP core design. The design program of each module was using the language of verilog HDL, and realized the simulation by the software modelsim. The IP core repeated used in the SOPC system greatly improves the encoding speed and makes the design simpler and stronger in expansibility.
  • Keywords
    data compression; hardware description languages; image coding; system-on-chip; Avalon-ST bus interface; Avalon-ST standard; Huffman coding module; JPEG compression principle; SOPC system; color conversion module; image compression IP core design; quantification module; run coding module; software modelsim; system on a programmable chip; verilog HDL language; zigzag module; Application software; Design engineering; Digital images; Educational institutions; Hardware design languages; Huffman coding; Image coding; Image storage; Paper technology; Transform coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Engineering and Computer Science, 2009. ICIECS 2009. International Conference on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-4994-1
  • Type

    conf

  • DOI
    10.1109/ICIECS.2009.5362912
  • Filename
    5362912