Investigation of Substrate Noise Isolation Solutions in Deep Submicron (DSM) CMOS Technology

Author

Lin, Henry ; Kuo, James ; Sobot, Robert ; Syrzycki, Marek

Author_Institution

Simon Fraser Univ., Burnaby

fYear

2007

fDate

22-26 April 2007

Firstpage

1106

Lastpage

1109

Abstract

This paper investigates substrate noise propagation and attenuation with a focus on analysis for deep submicron structures and short propagation distances. The discussed issues include effects of noise source/target doping types, noise source and target separation distances, presence of guard rings, and the utilization of deep-well structures on noise shielding. Simulation results from 2D simulators MEDICItrade and SEQUOIAtrade are presented in the analysis. We also propose a p-n-p-well with deep n-well guard ring structure which facilitates a fully isolated p-well while providing over 50 dB of noise attenuation up to 10 GHz .

Keywords

CMOS integrated circuits; integrated circuit noise; isolation technology; radiofrequency integrated circuits; semiconductor doping; system-on-chip; RF electronics; deep submicron CMOS technology; guard ring structure; noise attenuation; noise shielding; short propagation distance; simulation; substrate noise isolation; system-on-chip; target doping type; target separation distance; Analytical models; Attenuation; CMOS technology; Circuit noise; Circuit simulation; Computational modeling; Doping; Isolation technology; Medical simulation; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2007. CCECE 2007. Canadian Conference on

Conference_Location

Vancouver, BC

ISSN

0840-7789

Print_ISBN

1-4244-1020-7

Electronic_ISBN

0840-7789

Type

conf

DOI

10.1109/CCECE.2007.282

Filename

4232941