5-GHz band linear CMOS power amplifier IC with a novel integrated linearizer for WLAN applications

Author

Uchida, Yasuo ; Shihai He ; Xin Yang ; Qing Liu ; Yoshimasu, Toshihiko

Author_Institution

Grad. Sch. of Inf., Waseda Univ., Kitakyushu, Japan

fYear

2012

fDate

21-23 Nov. 2012

Firstpage

240

Lastpage

242

Abstract

In this paper, novel linearization technique is proposed to realize a 5-GHz band linear CMOS power amplifier IC for WLAN application. The novel linearizer which consists of a diode-connected PMOS bias circuit and a PMOS varactor connected in parallel with an NMOS amplifier is effectively to suppress the gain compression and phase distortion of the power amplifier. A CMOS power amplifier IC is designed, fabricated and fully tested using TSMC 0.13-μπι CMOS technology. With these proposed techniques, the measurement results show a third-order IMD improvement of 9 dB over wide output power range and the maximum improvement of 18 dB. The power amplifier IC exhibits an output PldB of 19.5 dBm and a power gain of 9.5 dB at an operation voltage of 3.3 V.

Keywords

MMIC power amplifiers; field effect MMIC; microwave diodes; varactors; NMOS amplifier; PMOS varactor; TSMC CMOS technology; WLAN applications; diode-connected PMOS bias circuit; frequency 5 GHz; gain 9.5 dB; gain compression suppression; integrated linearizer; linear CMOS power amplifier IC; power amplifier phase distortion; size 0.13 mum; third-order IMD improvement; voltage 3.3 V; Decision support systems; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology (RFIT), 2012 IEEE International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-4673-2303-1

Type

conf

DOI

10.1109/RFIT.2012.6401673

Filename

6401673