• DocumentCode
    281849
  • Title

    Some developments towards analogue CMOS VLSI design

  • Author

    Haigh, D.G. ; Taylor, J.T. ; Steptoe, K.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Univ. Coll., London, UK
  • fYear
    1989
  • fDate
    32619
  • Firstpage
    42430
  • Lastpage
    313
  • Abstract
    Recently, the possibility of `real´ analogue VLSI has begun to emerge. A system of this type may be loosely conceived of as a large chip, consisting primarily of high density analogue circuitry with a relatively smaller portion of digital circuitry for memory and control. In order to meet this challenge, it is clearly necessary to have at one´s disposal, realisations for the basic system elements (or cells, e.g. operational amplifiers) which occupy small chip area, have low power consumption and still feature high precision performance. By adopting a firmly bottom-up approach, the authors examine different detailed aspects of analogue IC design which could help to bring the reality of analogue VLSI systems closer. These include continuous-time and discrete-time systems. They focus on minimisation of chip area and power consumption while maintaining high precision performance and consider complex analogue systems including artificial neural networks
  • Keywords
    CMOS integrated circuits; VLSI; circuit CAD; integrated circuit technology; linear integrated circuits; neural nets; switched capacitor networks; CAD tools; SC circuits; analogue CMOS VLSI design; artificial neural networks; bottom-up approach; chip area minimisation; continuous time systems; discrete-time systems; linear IC; power consumption minimisation;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    VLSI Analogue Design, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    198310