• DocumentCode
    2819146
  • Title

    Static analysis of deadends in SVA constraints

  • Author

    Dsouza, Ashvin

  • Author_Institution
    Synopsys, Inc., Marlboro, MA, USA
  • fYear
    2010
  • fDate
    10-12 June 2010
  • Firstpage
    82
  • Lastpage
    89
  • Abstract
    When sequential constraints are used in constrained random simulation, it is possible for the choice of solution for the constraints at any cycle to lead to a deadend at a later cycle. A deadend occurs when the constraints have no solution, which indicates a problem with the constraints. We describe a method to identify deadends for a set of SVA constraints and to generate additional SVA constraints that will prevent these deadends. The generated constraints provide insight into the nature of the deadends and help to resolve them. Our method for identifying deadends also makes use of an efficient technique for finding minimal unsatisfiable subsets of an unsatisfiable set of Boolean expressions.
  • Keywords
    Boolean algebra; program diagnostics; simulation; SVA constraint; boolean expression; constrained random simulation; deadend; sequential constraint; static analysis; Analytical models; Computational modeling; Debugging; Delay; Error analysis; Hardware design languages; Law; Legal factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Level Design Validation and Test Workshop (HLDVT), 2010 IEEE International
  • Conference_Location
    Anaheim, FL
  • ISSN
    1552-6674
  • Print_ISBN
    978-1-4244-7805-7
  • Type

    conf

  • DOI
    10.1109/HLDVT.2010.5496656
  • Filename
    5496656