DocumentCode
282361
Title
Multistandard and echo cancelling modem using front end processor
Author
Yamamoto, Kazushige
Author_Institution
OKI Electr. Ind. Co. Ltd., Tokyo, Japan
fYear
1989
fDate
32840
Firstpage
42461
Lastpage
42464
Abstract
A new front end processor (FEP), containing an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) and a digital signal processor (DSP), has been developed to achieve digital implementation of the whole modem system. The paper describes the multistandard and echo cancelling modem system using this type of FEP. The chip consists mainly of two blocks, the ADC and DAC block and the DSP block. In the ADC and DAC block, the oversampling delta-sigma modulation technique is adopted to obtain a wide dynamic range (80 dB) and high resolution (equivalent to 13 bits)
Keywords
digital signal processing chips; echo suppression; large scale integration; modems; satellite computers; standards; 13 bit; ADC; DAC; DSP; LSI; analog-to-digital converter; digital signal processor; digital-to-analog converter; dynamic range; echo cancelling modem; front end processor; high resolution; multistandard modem; oversampling delta-sigma modulation;
fLanguage
English
Publisher
iet
Conference_Titel
Circuits and Devices for Data Communications, IEE Colloquium on
Conference_Location
London
Type
conf
Filename
199061
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