DocumentCode
2824078
Title
A 4.1 to 5.1 GHz 430 μA injection-locked frequency divider by 7 in 65 nm CMOS
Author
Bevilacqua, Andrea ; Lorenzon, Leonardo ; Da Dalt, Nicola ; Gerosa, Andrea ; Neviani, Andrea
Author_Institution
DEI, Univ. of Padova, Padova, Italy
fYear
2010
fDate
14-16 Sept. 2010
Firstpage
150
Lastpage
153
Abstract
Direct injection locking applied to a ring oscillator results in a divide-by-7 frequency divider circuit with a 22% locking range, from 4.1 to 5.1 GHz. The 38 × 31 μm2 65 nm CMOS prototype draws 430 μA from a 1.2 V supply. The output phase noise tracks the reference´s one with the expected 17 dB difference at small offsets, settling to a -133dBc/Hz floor at larger offsets. The integrated rms jitter of 1.9 ps is adequate for the target digital clocking applications.
Keywords
CMOS integrated circuits; frequency dividers; injection locked oscillators; phase noise; CMOS; current 430 muA; digital clocking; direct injection locking; frequency 4.1 GHz to 5.1 GHz; injection-locked frequency divider; output phase noise; ring oscillator; size 65 nm; voltage 1.2 V; Clocks; Frequency conversion; Frequency measurement; Noise measurement; Phase noise; Ring oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
ESSCIRC, 2010 Proceedings of the
Conference_Location
Seville
ISSN
1930-8833
Print_ISBN
978-1-4244-6662-7
Type
conf
DOI
10.1109/ESSCIRC.2010.5619867
Filename
5619867
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