VLSI macro cell for edge-preserving noise smoothing and deblocking in low-power video communications

Author

Saponara, Sergio ; Fanucci, Luca ; Terreni, Pierangelo

Author_Institution

Dept. of Inf. Eng., Pisa Univ., Italy

Volume

3

fYear

2003

fDate

27-30 Dec. 2003

Firstpage

1563

Abstract

A VLSI macro cell for edge-preserving noise reduction and deblocking in low-power video communications is proposed. Based on a non-linear rational operator the filter is enhanced by a noise estimator which adapts the filtering coefficients according to the input signal statistics. Realized in a 0.18 μm CMOS technology the architecture minimizes power consumption in the order of few mW while keeping real-time processing for main video formats.

Keywords

CMOS integrated circuits; VLSI; filtering theory; interference suppression; low-power electronics; video communication; video signal processing; 0.18 micron; CMOS technology; VLSI design; VLSI macro cell; edge-preserving noise deblocking; edge-preserving noise reduction; edge-preserving noise smoothing; filtering coefficient; input signal statistics; low-power video communication; noise estimator; nonlinear rational operator; power consumption; real-time processing; CMOS process; CMOS technology; Energy consumption; Filtering; Filters; Noise reduction; Signal to noise ratio; Smoothing methods; Statistics; Very large scale integration; Image and Video Processing; Low-power Circuits; Multimedia; VLSI Design;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003 IEEE 46th Midwest Symposium on

ISSN

1548-3746

Print_ISBN

0-7803-8294-3

Type

conf

DOI

10.1109/MWSCAS.2003.1562596

Filename

1562596